EP20K200FC484-3N vs EP20K200EFC484-2N Comparaison
Comparaison détaillée côte à côte de EP20K200FC484-3N par Altera et EP20K200EFC484-2N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K200FC484-3N | EP20K200EFC484-2N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $92,50 | $175,00 |
| Series | APEX-20K | — |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Logic Elements / Logic Cells | 8320 | — |
| System Gates | 200,000 | 200,000 |
| Total RAM Bits | 106,496 | 106,496 |
| Number of I/O | 382 | — |
| Number of Logic Blocks/Elements | 8320 | — |
| Supply Voltage (Core) | 1.71 V to 1.89 V | — |
| Supply Voltage (I/O) | MultiVolt 2.5 V / 3.3 V / 5.0 V | — |
| Propagation Delay | 2.5 ns (typical) | — |
| Température de fonctionnement | 0°C to +85°C (Commercial) | 0 °C to +85 °C (Commercial) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Boîtier / Format | 484-BGA (FineLine BGA, 23x23 mm) | — |
| Supplier Device Package | 484-FBGA (23x23) | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| PLL Count | 4 | — |
| JTAG Support | Yes (IEEE 1149.1) | — |
| Statut RoHS | Compliant (Pb-free package) | [DATA_NEEDED: RoHS status] |
| Speed Grade | -3N | -2 |
| Family | — | APEX-20KE |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Logic Elements | — | 8,320 |
| Embedded System Blocks (ESB) | — | 52 (True Dual-Port RAM) |
| Maximum User I/O | — | 376 |
| Boîtier | — | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Core Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Propagation Delay (typ.) | — | 2.5 ns |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | — | 4 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |