EP20K300EBC652-2 vs EP20K100EBC652-2X Comparaison
Comparaison détaillée côte à côte de EP20K300EBC652-2 par Altera et EP20K100EBC652-2X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K300EBC652-2 | EP20K100EBC652-2X |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Unknown | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $384,08 | $85,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Device Family | APEX-20KE | — |
| Logic Cells | 11520 | — |
| Macros | 1152 | — |
| Total RAM Bits | 147456 bits | — |
| I/O Count | 408 | — |
| Tension d'alimentation | 1.71 V to 1.89 V | — |
| Boîtier | 652-BGA | 652-ball BGA (EBC652) |
| Package Dimensions | 45 mm x 45 mm | — |
| Technology | 0.22 um (reported for family variant) | — |
| Fréquence d'horloge maximale | 350 MHz (reported for family variant) | — |
| Configuration Technology | SRAM-based programmable logic (family description) | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | 0C to +85C (commercial) |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Family | — | APEX 20KE |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Logic Elements | — | 4,160 |
| Embedded System Blocks (ESBs) | — | 26 |
| Maximum RAM Bits | — | 53,248 |
| Maximum User I/O Pins | — | 246 |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O | — | 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | -2 (faster commercial) |
| Process Technology | — | 0.18 µm CMOS, SRAM-based |
| Configuration Method | — | Passive Serial / Passive Parallel / JTAG (EPC) |
| Clock Resources | — | Up to 4 DLLs, multiple global clocks |