EP20K30EQC208-2 vs EP20K200EQC208-3 Comparaison
Comparaison détaillée côte à côte de EP20K30EQC208-2 par Intel et EP20K200EQC208-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K30EQC208-2 | EP20K200EQC208-3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $7,92 | $65,00 |
| Family | APEX 20KE | APEX 20KE |
| Device Logic | FPGA (SRAM-based) | — |
| Typical Gates | 30,000 | — |
| Logic Elements | 1,200 | — |
| Embedded Memory (RAM bits) | 24,576 | — |
| Maximum User I/O | 125 | 136 |
| Dedicated Inputs | 4 | — |
| Boîtier | 208-BFQFP (PQFP-208) | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) |
| Speed Grade | -2 (2.69 ns pin-to-pin) | -3 |
| Core Supply Voltage | 1.71 V to 1.89 V | — |
| I/O Standard | LVDS-compatible, 1.8 V / 2.5 V / 3.3 V (per bank) | — |
| Fréquence d'horloge maximale | 160 MHz | — |
| Propagation Delay | 2.69 ns | — |
| Configuration Interface | IEEE 1149.1 JTAG, Passive serial, Active serial | — |
| Température de fonctionnement | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | 1.8 V CMOS, MultiCore architecture | — |
| Type de montage | Surface Mount (PQFP with gull-wing leads) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Series | — | APEX 20K (enhanced "E" variant) |
| Product Type | — | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable |
| System Gates (typical) | — | 200,000 |
| Logic Elements (LEs) | — | 8,320 |
| Embedded RAM Bits | — | 106,496 |
| Core Supply Voltage (VCCINT) | — | 2.5 V (typical, APEX 20KE generation) |
| I/O Supply Voltage (VCCIO) | — | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Terminal Pitch | — | 0.5 mm |
| Technology | — | CMOS, SRAM configuration cell |
| Configuration Mode | — | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) |
| Embedded Array Blocks (EABs) | — | Yes (dual-port RAM/ROM, up to 16-bit wide) |
| MultiVolt I/O Support | — | Yes |
| LVDS Support | — | True-LVDS (enhanced "E" variant feature) |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 (168 Hours) |
| Operating Temperature (Commercial) | — | 0 °C to 85 °C |