EP20K400BC652-1 vs EP20K400GC655-1 Comparaison
Comparaison détaillée côte à côte de EP20K400BC652-1 par Intel et EP20K400GC655-1 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteComparaison des spécifications
| Paramètre | EP20K400BC652-1 | EP20K400GC655-1 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $108,00 | $135,00 |
| Series | APEX-20K | EP20K400 |
| Family | APEX 20KE (1.8 V, LVDS) | APEX 20K |
| Logic Macrocells | 1664 | — |
| Total Gates | 400,000 | — |
| User I/O | 502 | — |
| Boîtier | 652-BGA (45x45 mm, thermally enhanced) | 655-pin CPGA (Ceramic Pin Grid Array) |
| Supplier Device Package | 652-BGA | — |
| Total RAM Bits | 212,992 | 212,992 |
| Propagation Delay | 2.5 ns | 2.5 ns |
| Supply Voltage - Core | 1.71 V to 1.89 V (2.5 V standard) | — |
| Logic Family | CMOS | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | 0 °C to +85 °C (commercial) |
| Type de montage | Surface Mount | Through-Hole |
| Niveau MSL | [DATA_NEEDED: MSL Level] | — |
| Statut RoHS | unknown | Non-compliant (contains lead in ceramic package) |
| Architecture | MultiCore (LUT + product-term + embedded memory) | — |
| Logic Elements | — | 16,640 |
| Maximum Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Embedded System Blocks (ESBs) | — | 4 |
| Maximum User I/O | — | 502 |
| Dedicated Inputs | — | 6 |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V |
| Maximum Internal Frequency | — | 250 MHz |
| Nombre de broches | — | 655 |
| Configuration Modes | — | Passive Serial, Passive Parallel Async, Passive Parallel Sync |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |