EP20K400BC652-1V vs EP20K400BC652-1X Comparaison
Comparaison détaillée côte à côte de EP20K400BC652-1V par Altera et EP20K400BC652-1X par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400BC652-1V | EP20K400BC652-1X |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $47,95 | $140,00 |
| Series | APEX-20KC | APEX 20KE |
| Family | APEX 20K | APEX 20K |
| Device Sub-Family | EP20K400 | — |
| System Gates | 1,052,000 | 400,000 |
| Maximum Logic Elements | 212,992 | — |
| Macrocells / LABs | 16640 | — |
| Embedded Memory (bits) | 212,992 | 212,992 |
| Maximum User I/O | 502 | 502 |
| Speed Grade | -1 | — |
| Clock-to-Output (Tco) | 2.5 ns | — |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | 2.5 V | — |
| Boîtier | 652-BGA (FineLine, 45 x 45 mm) | 652-ball PBGA (45 x 45 mm, 1.27 mm pitch) |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | 0C to +85C (commercial) | Industrial (per datasheet) |
| Configuration | SRAM-based, JTAG IEEE 1149.1 | — |
| Architecture | MultiCore (LUT + product-term + ESB) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status not stated in retrieved snippets] |
| Logic Elements / Cells | — | 16,640 |
| Embedded Array Blocks (EABs) | — | 104 x 2,048 bits |
| Dedicated Inputs | — | 4 |
| PLLs | — | 4 |
| DLLs | — | 4 |
| Maximum Frequency | — | 250 MHz |
| Propagation Delay (pin-to-pin) | — | 2.5 ns |
| Core Voltage | — | 2.5 V |
| Process Technology | — | 0.22 um CMOS |
| I/O Standard Support | — | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS |
| Programming Interface | — | IEEE 1149.1 JTAG |