EP20K400CB652C9 vs EP20K400CB652I7 Comparaison
Comparaison détaillée côte à côte de EP20K400CB652C9 par Intel et EP20K400CB652I7 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CB652C9 | EP20K400CB652I7 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $89,20 | $149,50 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 16640 | — |
| Gate Count | 400000 | — |
| Maximum Operating Frequency | 250 MHz | 375.94 MHz |
| User I/Os | 488 | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Supply Voltage | 1.8 V | 1.8 V |
| Propagation Delay | 2.5 ns | — |
| Température de fonctionnement | 0 °C to +85 °C (Commercial) | — |
| Boîtier | BGA-652, 45 × 45 mm, 1.27 mm pitch | BGA-652 (652-ball) |
| Type de montage | Surface Mount | — |
| Number of PLLs | 4 | — |
| Embedded Memory Blocks | MultiCore ESBs (Embedded System Blocks) | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI, HSTL, SSTL (MultiVolt I/O) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | — | Field-Programmable Gate Array (FPGA) |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| I/O Supply Voltage | — | 1.8 V / 3.3 V |
| Package Code (JESD-30) | — | S-PBGA-B652 |
| Terminal Form | — | Ball |
| Package Shape | — | Square |
| Maximum User I/O Pins | — | [DATA_NEEDED: max user I/O] |
| Embedded Memory | — | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | — | SRAM + JTAG (ISP) |
| Speed Grade | — | 7 |
| Temperature Grade | — | Industrial (-40 °C to +100 °C) |
| Manufacturer Status | — | Obsolete (Intel/Altera legacy FPGA) |