EP20K400CF672C-8 vs EP20K400CF672C8 Comparaison
Comparaison détaillée côte à côte de EP20K400CF672C-8 par Altera et EP20K400CF672C8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CF672C-8 | EP20K400CF672C8 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $95,00 | $108,00 |
| Family | APEX 20K | APEX 20KC |
| Logic Elements | 16,640 | 16,640 |
| Typical Gates | 400,000 | — |
| Macros | 1,664 | 1,664 |
| Maximum User I/O | 488 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Package Type | PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch) | — |
| Core Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO options] | — |
| Pin-to-Pin Delay (tPD) | 1.78 ns (speed grade -8) | — |
| Speed Grade | -8 | C8 |
| Temperature Grade (C) | Commercial, 0 °C to 85 °C | — |
| Process Technology | 0.15 µm all-layer copper CMOS | — |
| Embedded Memory Type | ESB (RAM / ROM / CAM) | — |
| Configuration Interface | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | APEX 20K |
| System Gates | — | 400,000 |
| Max User I/Os | — | 488 |
| Embedded RAM Bits | — | 212,992 |
| Core Voltage | — | 2.5 V |
| Logic Family | — | CMOS |
| Propagation Delay | — | 2.5 ns |
| Boîtier | — | 672-ball FineLine BGA (FC-FBGA) |
| Package Type Code | — | BGA-652 |
| Température de fonctionnement | — | 0C to 85C |