EP20K400CF672C8AA vs EP20K400CF672C8ES Comparaison
Comparaison détaillée côte à côte de EP20K400CF672C8AA par Intel et EP20K400CF672C8ES par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CF672C8AA | EP20K400CF672C8ES |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $145,00 | $158,40 |
| Family | APEX 20K | APEX 20KC |
| Number of Logic Elements/Cells | 16640 | — |
| Number of Logic Units (LEs) | [DATA_NEEDED: number of LUs] | — |
| Embedded System Blocks (ESBs) | 212 | — |
| On-chip RAM Bits | [DATA_NEEDED: total embedded memory bits] | — |
| Number of User I/O Pins | 488 | — |
| Package Type | 672-ball Fine-Pitch BGA (FBGA) | — |
| Number of Pins/Balls | 672 | — |
| Supply Voltage (Core) | 2.5 V | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) | — |
| Propagation Delay | [DATA_NEEDED: typical propagation delay] | 2.5 ns |
| Température de fonctionnement | 0 C to 85 C (Commercial) | 0°C to 85°C (Commercial) |
| Type de montage | Surface Mount | — |
| Packaging | Tray | — |
| Niveau de sensibilité à l'humidité (MSL) | 3 (168 Hours) | — |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not stated in verified data] |
| Series | — | EP20K400 |
| Logic Cells / Macros | — | 16,640 |
| System Gates (typical) | — | 400,000 |
| System Gates (maximum) | — | 212,992 [DATA_NEEDED: confirm datasheet interpretation] |
| Maximum User I/O | — | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] |
| Bidirectional I/O | — | 484 |
| Maximum Internal Frequency | — | 301.21 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Nominal Supply Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Boîtier | — | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore™ (LUT + Embedded System Block) |
| Programming Method | — | JTAG / in-system via configuration memory |