EP20K400CF672C9 vs EP20K400CF672C8AA Comparaison
Comparaison détaillée côte à côte de EP20K400CF672C9 par Altera et EP20K400CF672C8AA par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K400CF672C9 - APEX-20K 400K Gates FPGA, 672-FBGA | Intel / Altera
EP20K400CF672C9 Obsolete
Comparaison des spécifications
| Paramètre | EP20K400CF672C9 | EP20K400CF672C8AA |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $390,40 | $145,00 |
| Series | APEX-20KC | — |
| Logic Family / Architecture | MultiCore (LUT + ESB) | — |
| System Gates | 400,000 | — |
| Logic Cells / Elements | 16,640 | — |
| Maximum User I/Os | 488 | — |
| Boîtier / Format | 672-BBGA, FCBGA | — |
| Supplier Device Package | 672-FBGA (27x27 mm) | — |
| Ball Pitch | 1.0 mm | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O VCCIO range] | — |
| Process Technology | 0.22 um CMOS | — |
| Internal Maximum Frequency | 368 MHz | — |
| Propagation Delay | 2.5 ns | [DATA_NEEDED: typical propagation delay] |
| Température de fonctionnement | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Embedded Memory | Embedded System Blocks (ESB) | — |
| Configuration Method | Serial / Parallel PROM | — |
| Statut RoHS | RoHS non-compliant (legacy) | [DATA_NEEDED: RoHS status] |
| Type de montage | Surface Mount | Surface Mount |
| Family | — | APEX 20K |
| Number of Logic Elements/Cells | — | 16640 |
| Number of Logic Units (LEs) | — | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | — | 212 |
| On-chip RAM Bits | — | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | — | 488 |
| Package Type | — | 672-ball Fine-Pitch BGA (FBGA) |
| Number of Pins/Balls | — | 672 |
| Supply Voltage (Core) | — | 2.5 V |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | — | Tray |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 (168 Hours) |
| Configuration Interface | — | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |