EP20K400CF672I8N vs EP20K400CF672C7N Comparaison
Comparaison détaillée côte à côte de EP20K400CF672I8N par Intel et EP20K400CF672C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K400CF672I8N | EP20K400CF672C7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $195,00 | $160,00 |
| Family | APEX 20KC | APEX 20KC |
| Series | APEX 20K | — |
| Logic Cells | 16640 | — |
| System Gates | 400,000 | — |
| Maximum User I/O | 488 | 488 |
| Dedicated Inputs | 4 | — |
| Boîtier | 672-ball FC-FBGA | 672-ball FineLine BGA (FC-FBGA / BBGA) |
| Pin / Ball Pitch | 1.0 mm | — |
| Core Voltage | 1.8 V nominal (1.71 V to 1.89 V) | — |
| Propagation Delay | 1.78 ns | 2.5 ns (catalog) / 1.48 ns (some catalog) |
| Internal Operating Frequency | 301.21 MHz (max) | — |
| Fabrication Process | 0.15 µm all-layer copper-metal | — |
| Architecture | MultiCore (LUT + embedded memory) | — |
| Température de fonctionnement | 0 °C to +85 °C (Industrial suffix I) | 0 C to 85 C (Commercial) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not in provided data] |
| Type de mémoire | Embedded System Blocks (ESB) | — |
| Pin Compatibility | Pin-compatible with APEX 20KE family | — |
| Maximum System Gates | — | 1,052,000 |
| Typical Gates | — | 400,000 |
| Logic Elements (LEs) | — | 16,640 |
| Embedded Memory | — | 488 Kbits |
| User I/O (per catalog) | — | 480 / 502 (per source) |
| Process Technology | — | 0.18-micron CMOS, all-layer copper interconnect |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 3.3 V / 2.5 V banked |
| Maximum Frequency | — | 375.94 MHz (internal) |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Configuration Modes | — | PS, PPS, JTAG |