EP20K400GC655-1 vs EP20K400GC655-2V Comparaison
Comparaison détaillée côte à côte de EP20K400GC655-1 par Intel et EP20K400GC655-2V par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP20K400GC655-1 - 400K Gate APEX 20K FPGA, 655-pin CPGA | Intel/Altera
EP20K400GC655-1 ObsoleteAltera
EP20K400GC655-2V - 400K Gate APEX-20KC FPGA 655-CPGA | Altera
EP20K400GC655-2V ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K400GC655-1 | EP20K400GC655-2V |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $135,00 | $92,75 |
| Family | APEX 20K | APEX 20KC (1.8 V, LVDS) |
| Series | EP20K400 | APEX-20KC |
| Logic Elements | 16,640 | 16,640 |
| Maximum Gates | 1,052,000 | — |
| Typical Gates | 400,000 | — |
| Embedded System Blocks (ESBs) | 4 | — |
| Total RAM Bits | 212,992 | 212,992 |
| Maximum User I/O | 502 | — |
| Dedicated Inputs | 6 | — |
| Process Technology | 0.22 µm CMOS | CMOS, 0.18 um |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V | — |
| Maximum Internal Frequency | 250 MHz | — |
| Propagation Delay | 2.5 ns | 3.000 ns |
| Boîtier | 655-pin CPGA (Ceramic Pin Grid Array) | 655-CPGA (62.48 x 62.48 mm) |
| Nombre de broches | 655 | — |
| Type de montage | Through-Hole | Through-hole (CPGA) |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | [DATA_NEEDED: temperature grade] |
| Configuration Modes | Passive Serial, Passive Parallel Async, Passive Parallel Sync | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Statut RoHS | Non-compliant (contains lead in ceramic package) | unknown |
| System Gates | — | ~400,000 (typical marketing figure) |
| Number of I/O | — | [DATA_NEEDED: I/O count] |
| Core Voltage (VCCINT) | — | 2.375 V to 2.625 V (nominal 2.5 V) |
| LVDS Support | — | Yes |
| Package Type | — | Ceramic Pin Grid Array, through-hole |
| Speed Grade | — | -2 |
| Lead-Free | — | unknown |
| Architecture | — | MultiCore (LUT + product-term + embedded memory) |