EP20K600CB652I7 vs EP20K600CB652I7N Comparaison
Comparaison détaillée côte à côte de EP20K600CB652I7 par Intel et EP20K600CB652I7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CB652I7 | EP20K600CB652I7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $149,00 | $158,00 |
| Family | APEX 20KC | APEX 20KC |
| Manufacturer | Intel (formerly Altera) | — |
| Technology | 0.15 µm CMOS, SRAM-based | — |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | — |
| Maximum Internal Frequency | 375.94 MHz | — |
| Propagation Delay | 1.6 ns | — |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | — |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | — |
| Nombre de sorties | 480 | — |
| Boîtier | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | 652-pin FineLine BGA |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Température de fonctionnement | -40 °C to +85 °C (industrial, 'I' suffix) | — |
| Speed Grade | -7 | 7 |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | — |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | — |
| Statut RoHS | unknown | unknown |
| Typical Gates | — | 600,000 |
| Logic Elements (Cells) | — | 24,320 |
| Maximum Operating Frequency | — | 375.94 MHz |
| Process Technology | — | 0.15 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| User I/O Banks | — | [DATA_NEEDED: User I/O Banks] |
| Maximum User I/O | — | [DATA_NEEDED: Maximum User I/O] |
| Embedded System Block (ESB) Memory | — | 311,040 bits |
| Phase-Locked Loops (PLLs) | — | 4 |
| Operating Temperature Grade | — | Industrial (-40C to +100C) |
| Configuration Method | — | SRAM-based, JTAG (IEEE 1149.1) |