EP20K600CB652I7 vs EP20K600EBC652-3 Comparaison
Comparaison détaillée côte à côte de EP20K600CB652I7 par Intel et EP20K600EBC652-3 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CB652I7 | EP20K600EBC652-3 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $149,00 | $340,00 |
| Family | APEX 20KC | APEX 20K |
| Manufacturer | Intel (formerly Altera) | — |
| Technology | 0.15 µm CMOS, SRAM-based | — |
| System Gates | 600,000 | — |
| Logic Elements | 24,320 | 24320 |
| Maximum Internal Frequency | 375.94 MHz | — |
| Propagation Delay | 1.6 ns | 1.48 ns |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V range) | — |
| User I/O Count | 488 (4 dedicated inputs + 480 I/O) | — |
| Nombre de sorties | 480 | — |
| Boîtier | 652-ball FineLine BGA (LBGA, 1.27 mm pitch) | — |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40 °C to +85 °C (industrial, 'I' suffix) | 0 C to 85 C |
| Speed Grade | -7 | -3 |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Embedded Memory | ESBs configurable as dual-port RAM / ROM / CAM | 311296 bits |
| MultiVolt I/O Support | 1.8 V / 2.5 V / 3.3 V / 5.0 V tolerant banks | — |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Series | — | APEX-20KE |
| Device Type | — | FPGA (Field Programmable Gate Array) / SPLD Loadable |
| User I/Os | — | 488 |
| Number of Terminals | — | 652 |
| Package Type | — | BGA-652 (45 x 45 mm, 1.27 mm pitch) |
| Process Technology | — | 0.15-micron all-layer copper CMOS |
| Core Voltage | — | [DATA_NEEDED: core voltage] |
| I/O Voltage Support | — | Multi-volt 3.3 V / 2.5 V / 1.8 V |
| Configuration Method | — | JTAG / serial / passive parallel |
| PLLs | — | 4 |
| Lead-Free | — | [DATA_NEEDED: lead-free] |