EP20K600CF672-1X vs EP20K600CEF672C7 Comparaison
Comparaison détaillée côte à côte de EP20K600CF672-1X par Intel et EP20K600CEF672C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672-1X | EP20K600CEF672C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $95,00 | $98,40 |
| Series | APEX 20KC | APEX 20KC |
| Device Family | APEX 20KC MultiCore FPGA | — |
| Maximum Typical Gates | 600,000 | — |
| Logic Elements | 31,104 (per Altera APEX 20KC datasheet family) | — |
| Embedded System Blocks (ESBs) | up to 256 | — |
| Embedded Memory (max bits) | [DATA_NEEDED: ESB RAM bits] | — |
| PLLs | 4 | — |
| Maximum User I/O | [DATA_NEEDED: max user I/O count] | — |
| Boîtier | 672-ball BGA (CF672), 1.27 mm pitch | 672-ball FineLine BGA (FC-FBGA) |
| Speed Grade | -1 (industrial speed grade, X = lead-free) | — |
| Process Technology | 0.18 um SRAM CMOS | 0.15 µm CMOS, all-layer copper |
| Configuration Method | SRAM, JTAG (IEEE 1149.1), EPC passive serial | — |
| Tension d'alimentation | [DATA_NEEDED: VCCINT/VCCIO] | — |
| Température de fonctionnement | [DATA_NEEDED: industrial temp range] | 0 °C to +85 °C (commercial) |
| Type de montage | Surface Mount (BGA) | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Statut RoHS | Compliant (per Alibaba distributor listing: "RoHS Compliant") | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | Intel (formerly Altera) |
| Family | — | APEX 20KC (Enhanced Configuration) |
| Device Type | — | FPGA / Loadable PLD |
| Logic Elements / Cells | — | 24,320 |
| Gate Count (typical) | — | 600,000 gates |
| Maximum Operating Frequency | — | 375.94 MHz |
| Propagation Delay | — | 1.48 ns (typ) |
| User I/Os | — | 488 |
| Core Supply Voltage | — | 1.8 V |
| Package Code | — | BGA-652, 45 x 45 mm, 1.27 mm pitch |
| Configuration | — | SRAM-based, serial or parallel (EPC) |
| Embedded Memory | — | EAB blocks (dual-port RAM with byte enables) |
| LVDS Support | — | True-LVDS channels integrated |
| MultiVolt I/O | — | 1.8 V, 2.5 V, 3.3 V interfaces |
| External Memory Interface | — | DDR SDRAM, QDR SRAM |
| JTAG Support | — | IEEE 1149.1 boundary-scan |