EP20K600CF672C9 vs EP20K600CF672C9N Comparaison
Comparaison détaillée côte à côte de EP20K600CF672C9 par Intel et EP20K600CF672C9N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672C9 | EP20K600CF672C9N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $175,00 |
| Device Family | APEX 20KC | — |
| Typical Gate Count | 600,000 gates | — |
| Logic Elements (LEs) | 24,320 | — |
| Maximum User I/O | 488 pins | — |
| Embedded Memory (EAB) | 311 Kbits | — |
| Propagation Delay | 1.48 ns | 1.48 ns (per logic element) |
| Maximum Internal Frequency | 250 MHz | — |
| Core Voltage | 1.8 V | — |
| Process Technology | 0.15 µm all-layer copper-metal | 0.15 µm all-layer copper |
| Package Type | 672-pin FC-FBGA | FineLine BGA (FC-FBGA), 1.00 mm pitch, 45 x 45 mm |
| Package Dimensions | 45 x 45 mm, 1.27 mm pitch | — |
| Total Pin Count | 652 balls | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | 0 C to 85 C (commercial) |
| Configuration Interface | IEEE 1149.1 JTAG / passive serial / EPC configuration | JTAG (IEEE 1149.1), passive serial, active serial |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | — | APEX 20KC |
| Device Type | — | Loadable PLD / SRAM FPGA |
| System Gates | — | 600,000 |
| Logic Elements | — | 24,320 |
| Maximum Operating Frequency | — | 250 MHz |
| Core Supply Voltage | — | 1.71 V to 1.89 V (1.8 V nominal) |
| User I/Os | — | 488 |
| Total Terminals | — | 672 |
| Type de montage | — | Surface Mount |
| Embedded Memory | — | MultiCore EABs supporting up to 311,000 RAM bits |