EP20K600CF672I9N vs EP20K600CB652C8N Comparaison
Comparaison détaillée côte à côte de EP20K600CF672I9N par Intel et EP20K600CB652C8N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP20K600CF672I9N | EP20K600CB652C8N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $120,00 | $115,00 |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 24,320 cells | 24,320 cells |
| Typical Gates | 600,000 | — |
| Maximum Frequency | 250 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.18 µm all-layer copper-metal |
| Core Voltage (VCCINT) | 1.8 V | — |
| I/O Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Embedded Memory | 311,040 bits (approx. 38 KB) | 311,296 bits |
| Boîtier | 672-ball FC-FBGA | 652-ball LBGA, 45 x 45 mm, 1.27 mm pitch |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| User I/O Pins | [DATA_NEEDED: max user I/O] | 488 |
| Configuration Mode | JTAG / Serial / Parallel | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Température de fonctionnement | -40 °C to +85 °C (industrial) | 0 °C to 85 °C (commercial) |
| Statut RoHS | [DATA_NEEDED: RoHS status] | unknown |
| Device Type | — | Loadable PLD / FPGA |
| System Gates | — | 600,000 |
| Dedicated Inputs | — | 4 |
| Outputs | — | 480 |
| Propagation Delay (typ.) | — | 1.48 ns |
| Pin-to-Pin Timing | — | 1.78 ns |
| Internal Frequency (typ.) | — | 301.21 MHz |
| Core Supply Voltage | — | 1.8 V nominal (1.71 V to 1.89 V) |
| Speed Grade | — | C8 |
| Type de montage | — | Surface Mount (BGA) |
| Architecture | — | MultiCore LUT + Embedded System Blocks (ESB) |
| Pin-Compatible With | — | APEX 20KE family |