EP20K60EFC144-2XN vs EP20K600EFC144-2XN Comparaison
Comparaison détaillée côte à côte de EP20K60EFC144-2XN par Altera et EP20K600EFC144-2XN par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K60EFC144-2XN - APEX-20KE FPGA 60K Gates 93 I/O 144-BGA | Intel/Altera
EP20K60EFC144-2XN Nrnd
Comparaison des spécifications
| Paramètre | EP20K60EFC144-2XN | EP20K600EFC144-2XN |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $152,00 | $115,00 |
| Series | APEX-20KE | — |
| Family | APEX-20K (MultiCore Architecture) | APEX 20KE |
| Typical Gate Count | 60,000 gates | — |
| Logic Elements / Embedded Array Blocks | 2,560 | — |
| Embedded Memory (Bits) | 32,768 | — |
| Maximum User I/O | 93 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Supply Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Supply Voltage (VCCIO) | [DATA_NEEDED: VCCIO range] | — |
| Package Type | 144-BGA (Fine-pitch Ball Grid Array) | — |
| Package Code (per MPN suffix) | FBGA / LBGA, 13x13 mm | — |
| Type de montage | Surface Mount | — |
| Operating Temperature (TJ) | 0 C to +85 C (commercial) | — |
| Speed Grade | -2 (per MPN suffix) | -2 (mid-tier) |
| Configuration Method | JTAG (IEEE 1149.1), Passive Serial, Parallel | SRAM, IEEE 1532 / passive serial / passive parallel |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS] |
| Logic Family | CMOS, SRAM-based LUT | — |
| Logic Elements | — | 24,576 |
| Typical Gates | — | 600,000 |
| Maximum System Gates | — | 1,053,840 |
| Embedded RAM Bits | — | 311,040 bits (~38 KB) |
| Number of ESBs (Embedded System Blocks) | — | [DATA_NEEDED: ESB count] |
| Number of Multiplier Blocks | — | [DATA_NEEDED: multiplier count] |
| Number of PLLs | — | 4 |
| Number of I/O Pins | — | [DATA_NEEDED: usable I/O count] |
| Core Voltage | — | 1.8 V |
| I/O Voltage Banks | — | Multi-voltage (LVTTL/LVCMOS/PCI) |
| Process Technology | — | 0.18 um CMOS, 6-layer metal |
| Boîtier | — | 144-ball FineLine BGA |
| Température de fonctionnement | — | -40C to +85C (industrial, 'N' suffix) |