EP2A40B652C7 vs EP2A70B652C7 Comparaison
Comparaison détaillée côte à côte de EP2A40B652C7 par Intel et EP2A70B652C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40B652C7 | EP2A70B652C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $10,51 |
| Device Family | APEX II | — |
| Logic Elements | 40,000 LEs | — |
| Maximum User I/O Pins | 538 (per package, [DATA_NEEDED: exact count for BGA-652]) | — |
| Boîtier | 652-ball FineLine BGA | — |
| Embedded Memory | [DATA_NEEDED: ESB RAM bits for EP2A40] | — |
| Number of PLLs | [DATA_NEEDED: PLL count for EP2A40] | — |
| Operating Temperature Grade | Commercial (C suffix) | Commercial (C) |
| Speed Grade | 7 | 7 |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL+, SSTL, LVDS, LVPECL | — |
| Supply Voltage (Core) | 1.8 V nominal [DATA_NEEDED: exact tolerance] | — |
| Supply Voltage (I/O) | Multi-voltage I/O [DATA_NEEDED: VCCIO range] | — |
| Process Technology | [DATA_NEEDED: process node] | — |
| Configuration Method | SRAM-based, supported via EPC configuration devices | — |
| Statut RoHS | Unknown | [DATA_NEEDED: RoHS compliance status] |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Niveau MSL | [DATA_NEEDED: MSL rating] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | APEX II |
| Family | — | APEX II (Field-Programmable Gate Array) |
| Logic Elements (LEs) | — | 67200 |
| Typical Gates | — | 1140000 |
| Maximum User I/Os | — | 336 |
| Package Type | — | BGA-652 (FineLine BGA) |
| Package Size | — | 27 mm x 27 mm (approximate) |
| Core Voltage | — | 1.8 V |
| I/O Bank Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V (bank-dependent) |
| Configuration Interface | — | JTAG, Passive Serial |
| Type de mémoire | — | Embedded SRAM blocks (ESBs) |
| PLL / Clock Management | — | Yes, dedicated PLL blocks |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |