EP2A40F672I-9 vs EP2A40F672I-7 Comparaison
Comparaison détaillée côte à côte de EP2A40F672I-9 par Intel et EP2A40F672I-7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672I-9 | EP2A40F672I-7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $165,00 | $285,00 |
| Family | APEX II | APEX II |
| Device | EP2A40 | — |
| Logic Elements | 38,400 | 38,400 |
| System Gates | 1,500,000 | 1,500,000 |
| Maximum Operating Frequency | 366 MHz | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (banked) | — |
| Température de fonctionnement | -40 °C to +100 °C (Industrial) | -40°C to +85°C (Industrial) |
| Boîtier | 672-pin FC-FBGA (Fine-pitch Ball Grid Array) | 672-pin FC-FBGA |
| Speed Grade | -9 | -7 |
| True-LVDS Channels | Yes (dedicated) | — |
| Embedded Memory | Dual-port RAM, single-port RAM, ROM, CAM (via ESBs) | — |
| Hot Socketing | Supported | — |
| Configuration Mode | Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG | — |
| Moisture Sensitivity Level | MSL 3 | — |
| Peak Reflow Temperature | 220 °C | 220°C |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Manufacturer | — | Intel (formerly Altera) |
| Maximum Internal Frequency | — | 562 MHz |
| Core Voltage | — | 1.5 V |
| Embedded System Blocks (ESBs) | — | [DATA_NEEDED: total ESB count] |
| Embedded Memory (bits) | — | [DATA_NEEDED: total embedded RAM bits] |
| Maximum User I/O | — | [DATA_NEEDED: maximum user I/O count] |
| Phase-Locked Loops (PLLs) | — | 4 |
| Type de montage | — | Surface Mount (BGA) |
| Niveau de sensibilité à l'humidité (MSL) | — | 3 |
| Statut du cycle de vie | — | Obsolete (EOL by Altera/Intel) |
| Programming Interface | — | JTAG (IEEE 1149.1) |