EP2A40F672I7N vs EP2A40F672C6N Comparaison
Comparaison détaillée côte à côte de EP2A40F672I7N par Intel et EP2A40F672C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A40F672I7N | EP2A40F672C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $198,00 | $165,00 |
| Family | APEX II | APEX II |
| System Gates | 1.5 M | — |
| Logic Cells / Elements | 38,400 | — |
| Macrocells | 16 | — |
| Product Terms per Macrocell | 32 | — |
| Maximum Internal Frequency | 562 MHz | — |
| Propagation Delay (PLA mode) | 1.55 ns | — |
| User I/O Lines | 492 | — |
| Core Voltage | 1.5 V | 1.5 V |
| Process Technology | 0.15 µm | SRAM-based, 0.18 um (per family datasheet) |
| Boîtier | 672-pin FC-FBGA | 672-ball FineLine BGA |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40 °C to +85 °C (Industrial) | Commercial (0C to +85C) |
| Statut RoHS | Compliant (Pb-free) | [DATA_NEEDED: RoHS compliance status] |
| Configuration Interface | JTAG, Passive Serial, Passive Parallel, Synchronous | — |
| Logic Elements | — | 40,000 |
| Maximum System Gates | — | 1,125,000 |
| Embedded RAM Bits | — | 442,368 |
| Embedded System Blocks (ESBs) | — | 160 |
| Maximum User I/O Pins | — | [DATA_NEEDED: maximum user I/O count] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL, 1.8V/2.5V/3.3V/5V |
| Speed Grade | — | C6 (per part number suffix) |
| Configuration Methods | — | Passive Serial, Passive Parallel, JTAG |
| PLL Count | — | [DATA_NEEDED: PLL count] |