EP2A70B724I7 vs EP2A70B724C7ES Comparaison
Comparaison détaillée côte à côte de EP2A70B724I7 par Intel et EP2A70B724C7ES par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2A70B724I7 - APEX II FPGA 3M Gates 67200 Cells 420MHz 1.5V 724-FCBGA | Intel
EP2A70B724I7 ObsoleteComparaison des spécifications
| Paramètre | EP2A70B724I7 | EP2A70B724C7ES |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $198,50 | $2 190,00 |
| Family | APEX II | APEX II |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 67200 | — |
| Maximum System Gates | 3 M | — |
| Embedded Memory | [DATA_NEEDED: ESB bits - 429 Kb or similar] | — |
| Maximum User I/O Pins | approximately 422 (724-pin FCBGA) | — |
| Process Technology | 0.15 um CMOS | 0.15 µm |
| Core Voltage (VCCINT) | 1.5 V | — |
| I/O Voltages Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| PLL Blocks | 4 | — |
| True-LVDS Channels | 8 | — |
| Maximum Internal Frequency | 420 MHz | — |
| Boîtier | 724-pin FCBGA (FineLine BGA) | 724-pin FCBGA |
| Operating Temperature Grade | Industrial (-40 C to +100 C case) | — |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISP | — |
| Statut RoHS | [DATA_NEEDED: not stated in provided data] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 3,000,000 (3M) |
| Logic Elements (Cells) | — | 67,200 |
| Maximum Operating Frequency | — | 420 MHz |
| Core Voltage | — | 1.5 V |
| User I/O Pins | — | 540 |
| Speed Grade | — | C7 |
| Temperature Grade | — | Commercial (C) |
| Type de mémoire | — | Embedded System Block (ESB) |
| PLLs | — | Up to 8 |
| Type de montage | — | Surface Mount (BGA) |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Programming Interface | — | JTAG / ByteBlaster |
| Device Marking Suffix | — | ES (Engineering Sample) |