EP2A70F1508C7N vs EP2A70F1508C8 Comparaison
Comparaison détaillée côte à côte de EP2A70F1508C7N par Altera et EP2A70F1508C8 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2A70F1508C7N | EP2A70F1508C8 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $1 495,00 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Series | APEX II | APEX II (EP2A70) |
| Technology | 0.15 µm CMOS | — |
| Core Voltage | 1.5 V | 1.425 V to 1.575 V (1.5 V nominal) |
| Logic Cells | 67,200 cells | — |
| Logic Array Blocks | 6,720 LABs | — |
| Total RAM | 1,146,880 bits | — |
| Programmable I/O | 1,060 I/O pins | — |
| Maximum Stated Frequency | 420 MHz | — |
| Gate Capacity | 3 million gates | — |
| Boîtier | 1508-pin FC-FBGA | 1508-BBGA, FCBGA (40 x 40 mm) |
| Température de fonctionnement | 0°C to 85°C | 0 °C to 85 °C (commercial) |
| Type de montage | Surface mount | Surface Mount (BGA) |
| Statut RoHS | unknown | [DATA_NEEDED: RoHS compliance status] |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | unknown | — |
| Configuration Method | [DATA_NEEDED: configuration method] | — |
| Package Dimensions | [DATA_NEEDED: package dimensions] | — |
| Résistance thermique | [DATA_NEEDED: thermal resistance] | — |
| Courant d'alimentation | [DATA_NEEDED: supply current] | — |
| Device Family | — | APEX II |
| Logic Elements | — | 67,200 |
| Embedded RAM Bits | — | 1,146,880 |
| User I/O Count | — | 1060 |
| Maximum User I/O Pins | — | 1060 |
| Process Technology | — | 0.15 µm all-layer copper, up to 8 metal layers |
| High-Speed Interface Support | — | 1 Gbps True-LVDS, LVPECL, PCML, HyperTransport |
| Type de mémoire | — | Embedded dual-port RAM / ROM via ESBs |
| Architecture | — | Embedded array with LABs + ESBs |