EP2AGX45DF29I5N vs EP2AGX45DF29I4N Comparaison
Comparaison détaillée côte à côte de EP2AGX45DF29I5N par Intel et EP2AGX45DF29I4N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGX45DF29I5N | EP2AGX45DF29I4N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $318,00 | $195,75 |
| Device Family | Arria II GX | — |
| Logic Elements | 42,959 | — |
| Logic Array Blocks (LABs) | 1,805 | — |
| Embedded Memory (M9K blocks) | 3,517,440 bits | 319 |
| User I/Os | 364 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceivers | [DATA_NEEDED: number of transceiver channels] | — |
| Max Transceiver Data Rate | 3.75 Gbps | — |
| PLLs | 4 | — |
| Process Technology | 40 nm | 45 nm TSMC |
| Core Supply Voltage | 0.9 V | — |
| Température de fonctionnement | -40C to +100C (industrial) | -40C to +100C (Industrial) |
| Package Type | 780-ball FC-FBGA | — |
| Package Dimensions | 29 mm x 29 mm | — |
| Type de montage | Surface Mount | — |
| Niveau MSL | 3 | — |
| Statut RoHS | Compliant | Compliant (Pb-free) |
| Lead-Free | Yes | — |
| Family | — | Arria II GX |
| Device | — | EP2AGX45 |
| Logic Elements (LE) | — | 42,959 |
| Adaptive Logic Modules (ALM) | — | 21,050 |
| Embedded Memory Bits | — | 3,517,440 bits |
| Embedded Memory (M144K blocks) | — | 8 |
| DSP Blocks | — | 232 (18x18 multipliers) |
| User I/O Pins | — | 364 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Channels | — | 8 (GX family integrated) |
| Hard PCIe Controllers | — | 1 (Gen1, x1/x4/x8) |
| Boîtier | — | 780-ball FCBGA (29 mm) |
| Package Code | — | F29 / DF29 |
| Temperature Grade | — | I4 (Industrial, -40C to 100C junction) |
| Core Voltage | — | 0.9 V typical |
| Configuration Method | — | Passive Serial, Fast Passive Parallel, JTAG |