EP2AGX65CU17C4N vs EP2AGX65CU17I5G Comparaison
Comparaison détaillée côte à côte de EP2AGX65CU17C4N par Intel et EP2AGX65CU17I5G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGX65CU17C4N | EP2AGX65CU17I5G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Unknown |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 125,00 | $0,00 |
| Family | Arria II GX | — |
| Logic Elements (LE) | 60,214 | — |
| Logic Array Blocks (LABs) | 2,530 | — |
| Embedded Memory Bits | 5,371,904 | — |
| Maximum User I/Os | 156 | — |
| Transceiver Channels | 12 | — |
| Transceiver Data Rate | up to 6.375 Gbps | — |
| Process Technology | 40 nm | — |
| Core Voltage | 0.9 V | [DATA_NEEDED: core voltage] |
| Boîtier | 358-ball UBGA (FCBGA) 17x17 mm | 358-ball LFBGA, FCBGA |
| Température de fonctionnement | 0C to 85C (Commercial) | — |
| Speed Grade | C4 | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 | — |
| Statut RoHS | Compliant | Compliant |
| Hard Memory Controllers | DDR3, DDR2, QDRII+, RLDRAM II | — |
| PCIe Hard IP | Gen1 x1/x4, Gen2 x1/x4 | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | Arria II GX |
| Logic Elements | — | 60,214 |
| Programmable Logic Bits | — | 5,371,904 |
| User I/O Count | — | 156 |
| Number of Terminals | — | 358 |
| Terminal Form | — | Ball |
| Package Code | — | LFBGA |
| Package Shape | — | Square |
| Logic Cell Count | — | 60,214 |
| I/O Count | — | 156 |
| Lead Free Status | — | Not stated in verified data |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| I/O Voltage Support | — | [DATA_NEEDED: I/O voltage support] |
| Transceiver Count | — | [DATA_NEEDED: transceiver count] |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: maximum transceiver data rate] |
| Configuration Memory | — | [DATA_NEEDED: configuration memory] |
| Package Dimensions | — | [DATA_NEEDED: package dimensions] |
| Embedded Memory | — | [DATA_NEEDED: embedded memory] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |