EP2AGZ300FF35C4N vs EP2AGZ300FF35C3N Comparaison
Comparaison détaillée côte à côte de EP2AGZ300FF35C4N par Altera et EP2AGZ300FF35C3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGZ300FF35C4N | EP2AGZ300FF35C3N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 350,00 | $1 480,00 |
| Series | Arria II GZ | — |
| Logic Elements | 298,000 | — |
| Logic Array Blocks (LABs) | 11,920 | 11,920 |
| Embedded Memory (bits) | 18,854,912 (~17.9 Mbit) | — |
| User I/O Count | 554 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Process Technology | 40 nm | 40 nm |
| Core Voltage | 0.9 V | 0.9 V |
| Package Type | 1152-BBGA, FCBGA (flip-chip) | — |
| Terminal Form | Ball | — |
| Package Code (JEDEC) | HBGA | — |
| Operating Temperature Grade | Commercial (C4 = 0C to +85C) | Commercial |
| Configuration Memory | SRAM-based (volatile, requires boot device) | — |
| Transceivers | Multi-gigabit transceivers integrated | Up to 16 channels |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| PLLs | [DATA_NEEDED: PLL count] | 8 |
| Statut RoHS | Compliant (per Besenchips / DigiKey listing) | — |
| Lead-Free Status | Lead free (per Besenchips listing) | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Maximum Operating Frequency | 500 MHz | — |
| Family | — | Arria II GZ |
| Logic Elements (LE) | — | 298,000 |
| Embedded Memory (Bits) | — | 18,854,912 |
| User I/Os | — | 554 |
| Maximum User I/O Pins (Package) | — | 1,152 |
| 18x18 Multipliers | — | 554 |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| Boîtier | — | 1152-ball FCBGA (FF35) |