EP2AGZ350FH29I4G vs EP2AGZ350FH29I3G Comparaison
Comparaison détaillée côte à côte de EP2AGZ350FH29I4G par Altera et EP2AGZ350FH29I3G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2AGZ350FH29I4G | EP2AGZ350FH29I3G |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $1 450,00 |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Series | Arria II GZ | — |
| User I/O Count | 281 I/O | 281 |
| Boîtier | 780HBGA | 780-FBGA (FineLine BGA, FH29) |
| Type de montage | Surface Mount | Surface Mount |
| Logic Element Count | [DATA_NEEDED: logic element count] | — |
| Adaptive Logic Module Count | [DATA_NEEDED: adaptive logic module count] | — |
| Embedded Memory | [DATA_NEEDED: embedded memory capacity] | — |
| Transceiver Count | [DATA_NEEDED: transceiver count] | — |
| Maximum Transceiver Data Rate | [DATA_NEEDED: maximum transceiver data rate] | — |
| Core Voltage | [DATA_NEEDED: core voltage] | — |
| I/O Voltage | [DATA_NEEDED: supported I/O voltage] | — |
| Plage de température de fonctionnement | [DATA_NEEDED: operating temperature range] | -40C to +100C |
| Configuration Interface | [DATA_NEEDED: configuration interface] | — |
| Statut RoHS | unknown | Compliant |
| REACH Status | unknown | — |
| AEC-Q100 Qualification | not_qualified | — |
| Lead-Free Status | unknown | — |
| Halogen-Free Status | unknown | — |
| Family | — | Arria II GZ |
| Logic Elements (LE) | — | 350000 (approximately) |
| Process Node | — | 40 nm |
| Temperature Grade | — | Industrial (-40C to +100C) |
| Supply Voltage Core | — | [DATA_NEEDED: VCC core voltage] |
| Transceivers | — | Multi-gigabit transceivers (family supports up to 16 channels at up to 6.375 Gbps per family datasheet) |
| Memory Interface | — | DDR3 with read/write leveling support (family feature) |
| Embedded Multipliers | — | 18x18 hardware multipliers (family feature) |
| Configuration Method | — | Serial or parallel via Quartus II (family feature) |
| Niveau MSL | — | 3 (per BGA package handling guidelines) |
| Lead Free | — | Yes |
| Sans halogène | — | [DATA_NEEDED: halogen free status] |