EP2C35U484I8 vs EP2C35U484C8 Comparaison
Comparaison détaillée côte à côte de EP2C35U484I8 par Altera et EP2C35U484C8 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2C35U484I8 | EP2C35U484C8 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $55,00 | $92,40 |
| Family | Cyclone II | — |
| Logic Elements (LEs) | 33216 | — |
| Embedded Memory (bits) | 483840 | — |
| Embedded 18x18 Multipliers | 35 | — |
| Logic Array Blocks / LABs | 2076 | — |
| PLLs | 4 | — |
| Maximum User I/O | 322 | — |
| Boîtier | 484-FBGA (U484, 19x19 mm FineLine BGA) | — |
| Process Technology | 90 nm low-power CMOS | — |
| Température de jonction en fonctionnement | -40C to +100C (industrial) | — |
| Speed Grade | I8 (industrial, 8th speed bin) | C8 (commercial, 8th tier) |
| Configuration Modes | Passive Serial, Active Serial, JTAG | JTAG, AS, PS, FPP |
| Supply Voltage (Core) | 1.2 V | — |
| Supply Voltage (I/O Banks) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant (lead-free UBGA) |
| Series | — | Cyclone II |
| Family Name | — | Cyclone II |
| Logic Elements / Cells | — | 33,216 LE |
| Total RAM Bits | — | 483,840 bits (33216 cells) |
| Number of I/O | — | 322 user I/O |
| Number of Logic Blocks/Elements | — | 2,076 logic blocks |
| Number of Gates | — | [DATA_NEEDED: equivalent gate count] |
| Number of PLLs | — | 4 |
| Embedded Multipliers | — | 35 (18x18) |
| Package Type | — | 484-FBGA (UBGA-484), lead-free |
| Package Pin Count | — | 484 balls |
| Core Voltage | — | 1.15 V to 1.25 V |
| Internal Frequency (max) | — | 500 MHz |
| Température de fonctionnement | — | 0C to 85C (commercial) |
| Logic Family / Process | — | CMOS, 90 nm |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Statut du cycle de vie | — | Not Recommended for New Designs (NRND) |