EP2C50F672C8 vs EP2C50F672I8N Comparaison
Comparaison détaillée côte à côte de EP2C50F672C8 par Intel et EP2C50F672I8N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2C50F672C8 | EP2C50F672I8N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $155,40 | $248,42 |
| Family | Cyclone II | — |
| Logic Elements (LE) | 50,528 | — |
| Configurable Logic Blocks (CLBs / LABs) | 3,158 | — |
| Embedded Memory (M4K blocks) | 594 Kbits (129 M4K blocks) | — |
| Embedded Multipliers (18x18) | 86 | — |
| Phase-Locked Loops (PLLs) | 4 | — |
| Maximum User I/O Pins | 450 | — |
| Global Clock Networks | 16 | [DATA_NEEDED: global clock network count] |
| Process Technology | 90 nm CMOS, 1.2 V core | — |
| Maximum Internal Frequency | 402.58 MHz | — |
| Température de fonctionnement | 0 °C to +85 °C (commercial) | — |
| Boîtier | 672-pin FBGA (FineLine BGA), 27 x 27 mm | — |
| Speed Grade | 8 | — |
| Configuration Mode | Active Serial (AS), Passive Serial (PS), JTAG, Fast Passive Parallel (FPP) | — |
| Type de montage | Surface Mount, BGA | Surface mount BGA |
| Niveau MSL | 3 (168 hours) | — |
| Statut RoHS | Compliant (lead-free FBGA) | unknown |
| Product Type | — | Field Programmable Gate Array (FPGA) |
| Device Family | — | Cyclone II |
| Logic Technology | — | CMOS |
| Logic Elements | — | 50,528 |
| Embedded Memory | — | 594,432 bits |
| User I/O | — | 450 |
| Tension d'alimentation | — | 1.2 V |
| Package Type | — | 672-BGA |
| Package Designation | — | FBGA-672 |
| Nombre de broches | — | 672 |
| Ordering Temperature Grade | — | I8N industrial grade designation |
| Configuration Method | — | [DATA_NEEDED: configuration mode] |
| Plage de température de fonctionnement | — | [DATA_NEEDED: operating temperature range] |
| Embedded Multipliers | — | [DATA_NEEDED: embedded multiplier count] |
| Phase-Locked Loops | — | [DATA_NEEDED: PLL count] |
| REACH Status | — | unknown |