EP2C5Q208C8 vs EP2C5Q208C7 Comparaison
Comparaison détaillée côte à côte de EP2C5Q208C8 par Intel et EP2C5Q208C7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2C5Q208C8 | EP2C5Q208C7 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $26,20 | $15,92 |
| Family | Cyclone II | — |
| Logic Elements / Cells | 4608 | — |
| Total RAM Bits | 119808 bits | 119,808 bits |
| Number of User I/O | 142 | 142 |
| Boîtier | 208-BFQFP (PQFP) | — |
| Nombre de broches | 208 | — |
| Type de montage | Surface Mount | Surface Mount |
| Core Supply Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm | — |
| Speed Grade | C8 | — |
| Fréquence d'horloge maximale | 402.58 MHz (per FPGAkey listing) | — |
| Operating Temperature Grade | [DATA_NEEDED: temperature range by suffix] | — |
| Statut RoHS | RoHS non-compliant (per distributor data) | Unknown |
| Lead-Free Status | No (per distributor data) | — |
| Configuration Technology | [DATA_NEEDED: configuration memory type] | — |
| Embedded Multipliers | [DATA_NEEDED: number of 18x18 multipliers] | — |
| PLL Count | [DATA_NEEDED: number of PLLs] | — |
| I/O Standards Supported | [DATA_NEEDED: supported I/O standards] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | Cyclone II |
| Number of Logic Elements | — | 4,608 LE |
| Package Type | — | 208-BFQFP (PQFP-208) |
| Nombre de broches | — | 208 |
| Plage de température de fonctionnement | — | 0°C to +85°C (32°F to 185°F) |
| Logic Family | — | CMOS |
| Terminal Form | — | Gull wing |
| Package Shape | — | Square |
| Number of PLLs | — | [DATA_NEEDED: PLL count] |
| Embedded Multiplier Count | — | [DATA_NEEDED: Embedded multiplier count] |
| Configuration Interface | — | [DATA_NEEDED: Configuration scheme support] |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: Fmax by speed grade] |
| Number of Logic Array Blocks | — | [DATA_NEEDED: LAB count] |
| Terminal Pitch | — | [DATA_NEEDED: Terminal pitch] |