EP2S130F780C5 vs EP2S90F780C5 Comparaison
Comparaison détaillée côte à côte de EP2S130F780C5 par Intel et EP2S90F780C5 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2S130F780C5 | EP2S90F780C5 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $2 295,00 | $1 100,00 |
| Family | Stratix II | Stratix II FPGA |
| Logic Elements | 132,540 | 90,960 |
| Logic Array Blocks (LABs) | 6627 | — |
| User I/O Count | 534 | — |
| Embedded Memory (bits) | 6,737,280 | — |
| Embedded 18x18 Multipliers | 252 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V (typ. 1.2 V) | — |
| Internal Clock Frequency (max) | 609.76 MHz | — |
| Speed Grade | C5 | C5 |
| Température de fonctionnement | 0 C to +85 C (TJ) | 0 C to 85 C (Commercial) |
| Boîtier | 780-FBGA (FC-FBGA), 29 mm x 29 mm | — |
| Lead-Free / RoHS | Lead Free / RoHS Compliant | — |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial / Fast Passive Parallel | — |
| DSP Performance | Up to ~1.4 GMACs (per family datasheet) | — |
| Series | — | Stratix II |
| Logic Array Blocks / ALMs | — | 4,548 |
| Embedded RAM (Total RAM Bits) | — | 4,520,488 |
| Embedded Multiplier / DSP Blocks | — | [DATA_NEEDED: DSP block count and 18x18 multiplier count] |
| User I/O Pins | — | 534 |
| Core Voltage | — | 1.15 V to 1.25 V |
| Internal Operating Frequency (max) | — | 609.76 MHz |
| Package Type | — | 780-ball FC-FBGA (FineLine BGA) |
| Package Dimensions | — | 29 x 29 mm |
| Ball Pitch | — | 1.0 mm |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG |
| PLLs | — | 4 enhanced + up to 8 fast PLLs |
| Statut RoHS | — | RoHS non-compliant (per alterachips listing) |
| Lead Free Status | — | [DATA_NEEDED: lead-free per JEDEC J-STD-609] |