EP2S30F484I5N vs EP2S30F484I4N Comparaison
Comparaison détaillée côte à côte de EP2S30F484I5N par Intel et EP2S30F484I4N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2S30F484I5N | EP2S30F484I4N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $305,00 |
| Family | Stratix II | Stratix II |
| Logic Elements | 33,880 | 33,880 |
| Adaptive Logic Modules (ALMs) | 13,552 | — |
| Maximum Operating Frequency | 609.76 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage | 1.2 V | 1.2 V (refer to datasheet) |
| Boîtier | 484-ball FC-FBGA | 484-ball FineLine BGA (FBGA) |
| Number of Pins/Balls | 484 | — |
| Speed Grade | I5 (industrial) | 4 |
| Temperature Grade | Industrial (-40C to +100C ambient) | — |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Cell Count | 33,880 cells | — |
| Embedded Memory | — | 1,369,728 bits |
| User I/O Pins | — | 342 |
| Ball Pitch | — | 1.0 mm |
| Operating Temperature Grade | — | Industrial -40C to +100C |
| Lead-Free / RoHS | — | Yes (N suffix indicates lead-free RoHS) |
| On-Chip DSP Blocks | — | Yes (dedicated 9x9/18x18/36x36 multipliers) |
| PLLs | — | Yes (on-chip, refer to datasheet for count) |
| Configuration Method | — | Serial/parallel via Quartus II |