EP2S60F672C4N vs EP2S60F672C3 Comparaison
Comparaison détaillée côte à côte de EP2S60F672C4N par Intel et EP2S60F672C3 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP2S60F672C4N | EP2S60F672C3 |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $325,00 | $1 033,14 |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm CMOS |
| Logic Elements (LE) | 60,440 | — |
| Adaptive Logic Modules (ALM) | 24,176 | — |
| Embedded Memory (bits) | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | [DATA_NEEDED: 9x9 multiplier count] |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count] |
| Maximum User I/O | 492 | — |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Fabric Clock | 711.24 MHz | — |
| Boîtier | 672-pin FC-FBGA | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | C3 |
| Température de fonctionnement | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Type de montage | Surface Mount | Surface Mount |
| Niveau MSL | 3 | [DATA_NEEDED: MSL level] |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| Logic Elements | — | 60,440 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Total RAM Bits | — | 2,544,192 |
| User I/Os | — | 492 |
| PLLs | — | 4 |
| Global Clocks | — | [DATA_NEEDED: global clock count] |
| Configuration Modes | — | PS, PPS, PPA, FPP, JTAG |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |