EP2S90F1020C3 vs EP2S90F1020C3N Comparaison
Comparaison détaillée côte à côte de EP2S90F1020C3 par Intel et EP2S90F1020C3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2S90F1020C3N - 90nm Stratix II FPGA 90,960 LEs FC-FBGA-1020 | Altera
EP2S90F1020C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2S90F1020C3 | EP2S90F1020C3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $640,00 | $1 995,00 |
| Family | Stratix II | Stratix II (EP2S90) |
| Logic Elements (LEs) | 90,960 | — |
| Adaptive Logic Modules (ALMs) | 36,384 | — |
| Logic Array Blocks (LABs) | 4,548 | — |
| Embedded Memory (RAM bits) | 4,520,488 (~4.5 Mbit) | — |
| Maximum User I/Os | 758 | — |
| Embedded Multipliers (18x18) | 384 | — |
| Embedded DSP Blocks | 48 | — |
| Transceiver Channels | 12 | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Maximum Internal Clock Frequency | 816.99 MHz (family maximum) | — |
| Boîtier | 1020-pin FC-FBGA (Flip-Chip Fine-pitch BGA) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Operating Temperature (Speed Grade) | C3 (commercial speed grade) | — |
| Lead-Free / RoHS | Per Altera/Intel product page | — |
| Design Toolchain | Quartus II / Quartus Prime | — |
| Series | — | Stratix II |
| Logic Elements | — | 90,960 |
| LABs (Logic Array Blocks) | — | 4,548 |
| Total RAM Bits | — | 4,520,488 |
| User I/O Count | — | 758 |
| Supply Voltage - Core | — | 1.15 V to 1.25 V (1.2 V nominal) |
| Température de fonctionnement | — | 0C to +85C (commercial grade) |
| Speed Grade | — | C3 (commercial, slowest) |
| Boîtier / Format | — | 1020-BBGA, FC-FBGA |
| Supplier Device Package | — | 1020-FBGA (33 x 33 mm) |
| DSP Block Count | — | [DATA_NEEDED: 18x18 multiplier count] |
| Embedded Transceivers | — | [DATA_NEEDED: number of high-speed transceivers] |
| Maximum User I/O Frequency | — | [DATA_NEEDED: LVDS / DDR max rate] |
| Statut RoHS | — | Compliant |
| Niveau MSL | — | 3 (per JEDEC J-STD-020) |
| Programming Tool | — | Altera Quartus II |