EP2SGX130GF40C3NES vs EP2SGX130GF1508C3N Comparaison
Comparaison détaillée côte à côte de EP2SGX130GF40C3NES par Altera et EP2SGX130GF1508C3N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES ObsoleteIntel
EP2SGX130GF1508C3N - Stratix II GX FPGA, 132K LEs, 20x Transceivers | Intel
EP2SGX130GF1508C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX130GF40C3NES | EP2SGX130GF1508C3N |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $124,00 | $1 395,00 |
| Family | Stratix II GX | FPGA - Field Programmable Gate Array |
| Logic Elements | 132540 | 132,540 |
| Logic Array Blocks (LABs) | 7047 | 6,627 |
| Maximum Internal Frequency | 778.82 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | — |
| Transceiver Channels | 4 to 20 (per device family configuration) | — |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Transceiver Feature | Embedded SERDES with Clock/Data Recovery (CRU) | — |
| Type de mémoire | TriMatrix embedded memory (distributed RAM, block RAM, shift register) | — |
| Boîtier | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) | 1508-ball FBGA (FCBGA), 40 x 40 mm, 1.0 mm pitch |
| Operating Temperature Grade | Commercial Extended | — |
| Terminal Form | Ball (BGA) | — |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Lead-free compliant (per package code MS-034AAU-1) | Lead-free / RoHS Compliant |
| Series | EP2SGX130 | Stratix II GX |
| User I/Os | — | 734 |
| Total RAM Bits | — | 6,747,840 (approximately 6.75 Mbit) |
| Number of Transceivers | — | 20 |
| Transceiver Data Rate (max) | — | 6.375 Gbps |
| Number of 18x18 Multipliers | — | 56 |
| Number of PLLs | — | 12 |
| Internal Fabric Clock (max) | — | 717 MHz |
| Memory Clock (max) | — | 717 MHz |
| Core Supply Voltage | — | 1.15 V to 1.25 V |
| Operating Temperature Range (TJ) | — | 0 °C to 85 °C (commercial) |
| Estimated EOL Date | — | 2023 (per GlobalSpec listing) |