EP2SGX30CF780C3 vs EP2SGX30F780C3N Comparaison
Comparaison détaillée côte à côte de EP2SGX30CF780C3 par Intel et EP2SGX30F780C3N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP2SGX30F780C3N - Stratix II GX FPGA, 33.8K LE, 780-FBGA | Altera
EP2SGX30F780C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX30CF780C3 | EP2SGX30F780C3N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $175,50 | $210,00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | 33,880 |
| Logic Array Blocks (LABs) | 1,694 | — |
| Embedded RAM Bits | 1,369,728 | — |
| User I/Os | 361 | — |
| Boîtier | 780-ball FineLine BGA | — |
| Process Node | 90 nm | — |
| Speed Grade | -3 | — |
| Température de fonctionnement | 0C to +85C (commercial) | 0C to +85C (Commercial, C3 suffix) |
| Transceivers | Embedded (GX family, up to 3.125 Gbps per channel) | — |
| Memory Interfaces | DDR / DDR2 / QDRII PHY | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Sans halogène | [DATA_NEEDED: halogen-free status] | — |
| Total RAM Bits | — | 1,369,728 |
| User I/O Pins | — | 361 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Total Transceivers | — | Up to 12 |
| Max Transceiver Data Rate | — | 6.375 Gbps |
| Process Technology | — | 90 nm |
| Core Voltage | — | 1.2 V |
| Max Internal Frequency | — | 816.9 MHz |
| Package Type | — | 780-ball FC-FBGA (29x29 mm) |
| I/O Standards Supported | — | LVDS, LVTTL, LVCMOS, SSTL, HSTL |
| Configuration Modes | — | Passive Serial, Fast Passive Parallel, JTAG, AES-128 |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |