EP2SGX30DF780I4N vs EP2SGX30DF780C7N Comparaison
Comparaison détaillée côte à côte de EP2SGX30DF780I4N par Intel et EP2SGX30DF780C7N par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2SGX30DF780I4N - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX30DF780I4N | EP2SGX30DF780C7N |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $171,00 | $225,00 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | 33,880 |
| Logic Blocks (CLBs) | 33,880 | — |
| Number of User I/O | 361 | — |
| Number of Inputs | 361 | — |
| Nombre de sorties | 361 | — |
| Total RAM Bits | 1,369,728 bits | — |
| Internal Clock Frequency | 622 MHz | — |
| Fréquence d'horloge maximale | 717 MHz | — |
| Core Supply Voltage | 1.2 V | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Température de fonctionnement | -40C to +85C (Industrial) | [DATA_NEEDED: temperature grade] |
| Boîtier | 780-pin FBGA (29 mm x 29 mm, 1 mm pitch) | 780-ball FineLine BGA (DF) |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Speed Grade | I4 (Industrial, Speed Grade 4) | C7 (standard) |
| Lead Free | Yes | — |
| Statut RoHS | Compliant | Compliant (per Altera product family) |
| Embedded Memory (bits) | — | 1,369,728 |
| Total Block RAM (M512 + M4K + M-RAM) | — | 361 blocks |
| Maximum User I/O | — | 361 |
| Transceiver Data Rate | — | 3.125 Gbps |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Embedded Multipliers (18x18) | — | [DATA_NEEDED: multiplier count] |
| PLLs | — | [DATA_NEEDED: PLL count] |
| Global Clocks | — | [DATA_NEEDED: global clock count] |
| Niveau MSL | — | [DATA_NEEDED: MSL rating] |
| Supply Voltage (Core) | — | [DATA_NEEDED: Vcore value] |