EP2SGX90EF1152C3 vs EP2SGX90EF1152C3ES Comparaison
Comparaison détaillée côte à côte de EP2SGX90EF1152C3 par Intel et EP2SGX90EF1152C3ES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2SGX90EF1152C3ES - Stratix II GX FPGA 90nm 558 I/O 1152-BBGA | Intel
EP2SGX90EF1152C3ES ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP2SGX90EF1152C3 | EP2SGX90EF1152C3ES |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 180,00 | $2 050,00 |
| Series | Stratix II GX | — |
| Logic Elements (LEs) | 90,960 | — |
| Total RAM Bits | 4,520,448 (4.5 Mbit) | — |
| User I/O Count | 558 | — |
| Number of LABs/CLBs | 4548 | — |
| Boîtier | 1152-FBGA (FineLine BGA) | 1152-BBGA (FineLine BGA, 35x35 mm) |
| Number of Transceivers | 12 | — |
| Transceiver Data Rate | 3.125 - 6.375 Gbps | Up to 6.375 Gbps per channel (family spec) |
| Number of PLLs | 4 | — |
| DSP Blocks (18x18 multipliers) | 384 | — |
| Core Voltage (VCCINT) | 1.2 V | — |
| Process Technology | 90 nm CMOS | — |
| Speed Grade | C3 | C3 |
| Température de fonctionnement | 0C to +85C (commercial) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Family | — | Stratix II GX |
| Process Node | — | 90 nm |
| Logic Elements | — | 90,960 |
| Embedded Memory | — | 4,520,448 bits (approx. 4.5 Mbit) |
| User I/O Pins | — | 558 |
| Temperature Grade | — | Commercial Extended (-40 C to +100 C) |
| Core Voltage | — | 1.5 V (Enhanced, 'E' suffix) |
| High-Speed Transceivers | — | Up to 12 channels (per Stratix II GX family) |
| DSP Blocks | — | Yes, dedicated 18x18 multipliers and accumulators |
| PLL Count | — | [DATA_NEEDED: PLL count for EP2SGX90 variant] |
| User I/O Banks | — | 24 (per package datasheet) |
| Configuration | — | SRAM-based, supports Fast Passive Parallel, Fast Active Serial, JTAG |
| Lead-Free | — | Yes |