EP2SGX90EF1152I2N vs EP2SGX90EF1152I5N Comparaison
Comparaison détaillée côte à côte de EP2SGX90EF1152I2N par Intel et EP2SGX90EF1152I5N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP2SGX90EF1152I5N - 90k LEs Stratix II GX FPGA 1.2V FC-FBGA-1152 | Intel
EP2SGX90EF1152I5N ObsoleteComparaison des spécifications
| Paramètre | EP2SGX90EF1152I2N | EP2SGX90EF1152I5N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 320,00 | $1 320,00 |
| Family | Stratix II GX | Stratix II GX |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements | 90,960 | — |
| Logic Array Blocks (LABs) | 4,548 | — |
| Total Embedded RAM Bits | 4,520,448 bits | — |
| User I/Os | 558 | — |
| Boîtier | 1152-BBGA (FC-FBGA, flip-chip) | — |
| Core Voltage | 1.2 V | — |
| Operating Temperature Grade | Industrial (I2) | INDUSTRIAL (I) |
| Process Node | 90 nm | — |
| Transceivers | Up to 12 high-speed serial channels (family spec) | — |
| Type de montage | Surface Mount (BGA) | Surface Mount |
| Statut RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Statut du cycle de vie | Active (Stratix II GX family) | — |
| Series | — | EP2SGX90 |
| Logic Elements (LEs) | — | 90,960 |
| Equivalent CLBs | — | 90,960 |
| Process Technology | — | 90 nm CMOS |
| Core Voltage (VCCINT) | — | 1.2 V |
| Fréquence d'horloge maximale | — | 609.76 MHz |
| Combinatorial Delay | — | 4.006 ns |
| Package Type | — | FC-FBGA (flip-chip fine-pitch BGA) |
| Number of Pins/Balls | — | 1152 |
| Package Code | — | BGA |
| Package Shape | — | SQUARE |
| Terminal Form | — | BALL |
| Embedded Transceivers | — | Yes (GX series, multi-gigabit PMA) |
| On-chip Block Memory | — | [DATA_NEEDED: total M512/M4K/M-RAM bits] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks] |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |