EP3C40F780C8 vs EP3C40F780C6N Comparaison
Comparaison détaillée côte à côte de EP3C40F780C8 par Intel et EP3C40F780C6N par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP3C40F780C8 | EP3C40F780C6N |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $99,95 | $172,00 |
| Family | Cyclone III | Cyclone III |
| Series | EP3C40 | — |
| Logic Elements | 39,600 | 39,600 |
| Total Memory Bits | 1,161,216 bits (1134 Kbit) | — |
| Embedded Memory | M9K blocks, 486 Kbit total (per family datasheet) | — |
| Embedded 18x18 Multipliers | 126 | — |
| General Purpose PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Maximum User I/O Pins | 535 | 535 |
| Process Technology | 65 nm low-power CMOS | 60 nm CMOS |
| Boîtier | 780-ball FBGA (FineLine BGA) | 780-ball FBGA (FineLine BGA) |
| Speed Grade | C8 (commercial, -40C to +85C operating range per 'C' designator family convention) | 6 (commercial) |
| User I/O Banks | [DATA_NEEDED: user I/O bank count] | — |
| Supported Memory Interfaces | DDR, DDR2, QDRII SRAM (via dedicated PHY) | — |
| Configuration | Serial (AS) / Parallel (AP) / JTAG | — |
| Statut RoHS | Compliant | Compliant |
| Type de montage | Surface Mount (BGA) | Surface Mount (FBGA) |
| Embedded Memory Bits | — | 1,161,216 |
| Embedded Memory (Kbytes) | — | 113 |
| M9K Memory Blocks | — | 126 |
| Logic Array Blocks (LABs) | — | 4,065 |
| PLLs | — | 4 |
| Core Voltage | — | 1.2 V |
| Température de fonctionnement | — | 0C to +85C (commercial) |
| Package Dimensions | — | 29 x 29 mm |
| Ball Pitch | — | 1.0 mm |
| Package Height | — | 2.6 mm |
| Lead Free | — | Yes |
| Configuration Method | — | SRAM, JTAG via USB-Blaster |