EP3CLS70F780C8N vs EP3CLS70F780I7 Comparaison
Comparaison détaillée côte à côte de EP3CLS70F780C8N par Altera et EP3CLS70F780I7 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP3CLS70F780C8N | EP3CLS70F780I7 |
|---|---|---|
| Marque | Altera | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,00 | $125,00 |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Logic Cells / Logic Blocks | 47 | — |
| Logic Cell Count | 70,208 cells | — |
| User I/O | 413 I/O | — |
| Tension d'alimentation | 1.2 V | — |
| Maximum Operating Frequency | 402 MHz | — |
| Process Technology | 65 nm | — |
| Package Type | FBGA | — |
| Package Pin Count | 780 balls | — |
| Package Form | BGA, square | — |
| Type de montage | Surface Mount | — |
| Temperature Grading | Other | — |
| Configuration Type | SRAM-based FPGA | — |
| Family | Cyclone III LS | Cyclone III LS |
| Statut RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (per Cyclone III LS datasheet prefix per verified data) |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| Logic Elements (LEs) | — | 70,208 |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count] |
| Embedded Memory Bits | — | 3,068,928 bits (2.93 Mbit) |
| Embedded Memory Blocks (M9K) | — | [DATA_NEEDED: M9K count] |
| Hardware Multipliers (18x18) | — | 413 |
| PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| Maximum User I/Os | — | 429 |
| Boîtier | — | 780-ball FBGA (1.0 mm pitch, 29 x 29 mm) |
| Operating Temperature (Industrial, 'I') | — | -40C to +100C (case) |
| Core Supply Voltage (VCCINT) | — | 1.15 V to 1.25 V |
| I/O Supply Voltage (VCCIO) | — | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.0 V / 3.3 V |
| Configuration Support | — | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) |
| Bitstream Encryption | — | AES-128/256 (LS-family feature) |
| Process Node | — | 60 nm TSMC low-power |
| Speed Grade | — | 7 (moderate) |