EP3SE110F1152C3N vs EP3SE110F1152C2NES Comparaison
Comparaison détaillée côte à côte de EP3SE110F1152C3N par Intel et EP3SE110F1152C2NES par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SE110F1152C3N - Stratix III E FPGA, 107.5K LE, FC-FBGA-1152 | Intel
EP3SE110F1152C3N ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP3SE110F1152C3N | EP3SE110F1152C2NES |
|---|---|---|
| Marque | Intel | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 560,00 | $1 320,00 |
| Family | Stratix III E | Stratix III Enhanced (EP3SE110) |
| Series | Stratix III | — |
| Logic Elements (LE) | 107,500 | — |
| Logic Array Blocks (LABs) | 4,300 | — |
| Total RAM Bits | 8,936,448 | — |
| User I/Os | 744 | — |
| Operating Frequency (max) | 500 MHz | — |
| Core Supply Voltage | 1.1 V nominal | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O supply range] | — |
| Process Technology | 65 nm TSMC | 65 nm |
| Package Type | FC-FBGA-1152 (flip-chip BGA) | — |
| Température de fonctionnement | 0 °C to 85 °C (commercial) | — |
| Speed Grade | C3 | C2 |
| Type de montage | Surface Mount | Surface Mount |
| Style de montage | SMD/SMT (Tray) | — |
| DSP Blocks | Yes (embedded multipliers) | Yes (variable-precision DSP) |
| Type de mémoire | M9K and M144K block RAM | Embedded M9K blocks |
| External Memory Support | DDR/DDR2/DDR3 with read/write leveling | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | Yes (per Altera/Intel datasheet family convention) | — |
| Manufacturer | — | Altera (Intel) |
| Logic Elements | — | 107,500 |
| User I/O Pins | — | 744 |
| Core Voltage | — | 1.1 V |
| Maximum Operating Frequency | — | 600 MHz |
| Boîtier | — | FC-FBGA-1152 (Flip-Chip) |
| Plage de température de fonctionnement | — | [DATA_NEEDED: temperature grade] |
| Transceivers | — | [DATA_NEEDED: transceiver count] |
| Configuration | — | SRAM-based, volatile |
| Programming Interface | — | JTAG / Passive Serial / Fast Passive Parallel |
| Toolchain | — | Quartus II (Stratix III support) |
| Statut RoHS | — | Non-Compliant (per Kynix listing) |