EP3SL340F1760I3 vs EP3SL340F1760C2 Comparaison
Comparaison détaillée côte à côte de EP3SL340F1760I3 par Intel et EP3SL340F1760C2 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SL340F1760I3 - Stratix III L FPGA, 337.5K LE, 1760-BGA | Intel
EP3SL340F1760I3 ⚠ Dernier achat
Comparaison des spécifications
| Paramètre | EP3SL340F1760I3 | EP3SL340F1760C2 |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Dernier achat | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $1 450,00 | $18 500,00 |
| Series | Stratix III L | Stratix III L |
| Logic Elements | 337,500 LE | — |
| LABs (Logic Array Blocks) | 13,500 | — |
| Embedded Memory Bits | 18,822,144 bit | — |
| User I/Os | 1120 | — |
| Number of Pins / Balls | 1760 | — |
| Package Type | FC-FBGA (1760-ball, FineLine BGA) | — |
| Package Code | BGA1760, 42x42, 40 | — |
| Core Voltage | 1.1 V | 0.9 V / 1.1 V |
| Process Technology | 65 nm | — |
| Température de fonctionnement | -40 °C to 100 °C (Industrial grade, I3 suffix) | 0C to +85C (Commercial, C2 suffix) |
| Speed Grade | I3 (Industrial, mid-speed bin) | — |
| Type de montage | Surface Mount | — |
| Statut RoHS | Compliant (Pb-free BGA balls) | Compliant |
| Configuration Memory | SRAM-based, volatile (requires external configuration device) | — |
| Transceivers | [DATA_NEEDED: transceiver count and data rate for this F1760 variant] | [DATA_NEEDED: transceiver count and max data rate] |
| DSP Blocks | [DATA_NEEDED: 18x18 multiplier count] | [DATA_NEEDED: DSP block count] |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Niveau MSL | MSL3 (JEDEC J-STD-020, reflow 245 °C peak) | — |
| Family | — | Stratix III |
| Logic Elements (LE) | — | 337,500 |
| Logic Array Blocks (LABs) | — | 13,500 |
| Embedded Memory (bits) | — | 18,822,144 |
| User I/O Count | — | 1,120 |
| Maximum User I/O Voltage | — | 3.3 V (LVTTL/LVCMOS supporting up to 3.0 V LVDS) |
| Process Node | — | 40 nm TSMC |
| Boîtier | — | 1760-ball FCBGA (FineLine BGA) |
| Ball Pitch | — | 1.0 mm |
| Configuration | — | SRAM-based, supports JTAG, FPP, AS, PS |
| Programmable Power Technology | — | Yes |
| PCIe Hard IP | — | Yes (Gen1/Gen2) |