EP3SL340H1152I4LN vs EP3SL340H1152I4L Comparaison
Comparaison détaillée côte à côte de EP3SL340H1152I4LN par Intel et EP3SL340H1152I4L par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SL340H1152I4LN - 337.5K LEs Stratix III L FPGA, 1152-BGA | Intel
EP3SL340H1152I4LN Obsolete
Comparaison des spécifications
| Paramètre | EP3SL340H1152I4LN | EP3SL340H1152I4L |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $18 050,00 | $4 100,00 |
| Series | Stratix III L | — |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 65 nm CMOS | — |
| Logic Elements | 337,500 | 337,500 |
| Adaptive Logic Modules (ALMs) | 135,000 | [DATA_NEEDED: ALM count] |
| Number of LABs/CLBs | 13,500 | — |
| Total RAM Bits | 18,821,144 | — |
| Maximum User I/Os | 744 | — |
| Température de fonctionnement | -40C to +100C (TJ) | -40C to +100C (industrial) |
| Core Voltage | 1.1 V | 0.9 V |
| Boîtier | 1152-BBGA, FCBGA (40x40 mm) | 1152-ball FC-HFBGA (FCBGA) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Product Status | Obsolete (last-time-buy expired) | — |
| Statut RoHS | Compliant (Pb-free) | Compliant (per Intel/Altera product page) |
| Max Core Frequency | 500 MHz (per FindIC summary) | — |
| Family | — | Stratix III L |
| Logic Array Blocks (LABs) | — | 13,500 |
| Total Memory Bits | — | 18,221,440 bits |
| Embedded Memory | — | M9K + M144K blocks |
| DSP Blocks (18x18 Multipliers) | — | [DATA_NEEDED: multiplier count] |
| User I/O Pins | — | 744 |
| User I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Process Node | — | 65 nm |
| Speed Grade | — | 4 |
| PLLs | — | [DATA_NEEDED: PLL count] |
| High-Speed Transceivers | — | [DATA_NEEDED: transceiver count] |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |
| Configuration | — | FPGA, SRAM-based, in-system programmable |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | Yes (Pb-free BGA balls) |