EP3SL50F484I4LG vs EP3SL50F484I4G Comparaison
Comparaison détaillée côte à côte de EP3SL50F484I4LG par Intel et EP3SL50F484I4G par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
EP3SL50F484I4LG - Stratix III L FPGA, 47.5K LE, 484-FCBGA | Altera (Intel)
EP3SL50F484I4LG NrndComparaison des spécifications
| Paramètre | EP3SL50F484I4LG | EP3SL50F484I4G |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $945,00 | $165,00 |
| Family | Stratix III L | Stratix III L |
| Series | EP3SL50 | — |
| Logic Elements | 47,500 | 47,500 |
| Embedded Memory | 2,184,192 bits (273 KB) | — |
| User I/Os | 296 | — |
| Boîtier | 484-Ball FCBGA (FBGA) | 484-BBGA, FC-BGA (FineLine BGA) 23 x 23 mm |
| Type de montage | Surface Mount | Surface Mount |
| Température de fonctionnement | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Speed Grade | I4 (fast) | — |
| Tension d'alimentation | 0.85 V / 1.1 V / 1.2 V / 2.5 V / 3.3 V (multi-rail) | — |
| Process Node | 40 nm | — |
| Statut RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Total I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: transceiver channel count] | — |
| Configuration Memory | SRAM-based | — |
| Configuration Interface | JTAG / Passive Serial / Fast Passive Parallel | — |
| LABs/CLBs | — | 1,900 |
| Total Memory Bits | — | 2,184,192 bits |
| Number of I/O | — | 296 user I/O |
| Number of Logic Gates | — | [DATA_NEEDED: total gate count] |
| Core Voltage | — | 1.1 V |
| Process Technology | — | 65 nm CMOS |
| Maximum Internal Frequency | — | 450 MHz |
| Supply Voltage Range | — | [DATA_NEEDED: full supply tolerance band] |
| Configuration Method | — | SRAM-based, loaded via JTAG, Active Serial, or Active Parallel |