EP610IPC-25 vs EP610LC15 Comparaison
Comparaison détaillée côte à côte de EP610IPC-25 par Intel et EP610LC15 par Rochester Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 ObsoleteComparaison des spécifications
| Paramètre | EP610IPC-25 | EP610LC15 |
|---|---|---|
| Marque | Intel | Rochester Electronics |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $8,85 | $5,45 |
| Family | Classic EPLD (EP610) | — |
| Architecture | PAL-type, CMOS, Erasable | — |
| Propagation Delay (tpd) | 25 ns (max) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 5 V (±10%) |
| Maximum Inputs | 20 | — |
| Maximum I/O Pins | 16 | — |
| Dedicated Outputs | 16 | — |
| Product Terms | 160 | — |
| Température de fonctionnement | 0 °C to +70 °C (Commercial) | 0 °C to +70 °C (LC suffix = commercial) |
| Boîtier | 24-pin PDIP (Plastic DIP) | PLCC-28 (J-Lead) |
| Technology | CMOS, UV-erasable (windowless in IPC pkg) | UV-erasable EPROM, CMOS |
| TTL Compatibility | 100% TTL emulation | — |
| Type de montage | Through-Hole | — |
| Niveau MSL | [DATA_NEEDED: MSL level] | — |
| Statut RoHS | Non-compliant (contains Pb, PDIP package) | Compliant (Rochester re-creation) |
| Logic Capacity | Equivalent to ~24 standard 24-pin PALs | — |
| Device Family | — | Classic EPLD (EP610) |
| Number of Macrocells | — | 16 |
| Number of Usable Gates | — | [DATA_NEEDED: usable gate count] |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Toggle Frequency (fMAX) | — | 83.3 MHz |
| Dedicated Inputs | — | 10 |
| I/O Pins | — | 16 |
| Total Logic Pins | — | 24 |
| Programming Interface | — | Altera 4-pin serial (Classic algorithm) |
| Security Bit | — | Yes (programmable) |