EP610LC15 vs EP610IPC-25 Comparaison
Comparaison détaillée côte à côte de EP610LC15 par Rochester Electronics et EP610IPC-25 par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP610LC15 - 16-Macrocell Classic EPLD, 15ns, 5V, PLCC-28 | Rochester
EP610LC15 Obsolete
Comparaison des spécifications
| Paramètre | EP610LC15 | EP610IPC-25 |
|---|---|---|
| Marque | Rochester Electronics | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | NRND |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $5,45 | $8,85 |
| Device Family | Classic EPLD (EP610) | — |
| Number of Macrocells | 16 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Toggle Frequency (fMAX) | 83.3 MHz | — |
| Supply Voltage (VCC) | 5 V (±10%) | 4.75 V to 5.25 V |
| Dedicated Inputs | 10 | — |
| I/O Pins | 16 | — |
| Total Logic Pins | 24 | — |
| Technology | UV-erasable EPROM, CMOS | CMOS, UV-erasable (windowless in IPC pkg) |
| Boîtier | PLCC-28 (J-Lead) | 24-pin PDIP (Plastic DIP) |
| Température de fonctionnement | 0 °C to +70 °C (LC suffix = commercial) | 0 °C to +70 °C (Commercial) |
| Programming Interface | Altera 4-pin serial (Classic algorithm) | — |
| Security Bit | Yes (programmable) | — |
| Statut RoHS | Compliant (Rochester re-creation) | Non-compliant (contains Pb, PDIP package) |
| Family | — | Classic EPLD (EP610) |
| Architecture | — | PAL-type, CMOS, Erasable |
| Propagation Delay (tpd) | — | 25 ns (max) |
| Maximum Inputs | — | 20 |
| Maximum I/O Pins | — | 16 |
| Dedicated Outputs | — | 16 |
| Product Terms | — | 160 |
| TTL Compatibility | — | 100% TTL emulation |
| Type de montage | — | Through-Hole |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |
| Logic Capacity | — | Equivalent to ~24 standard 24-pin PALs |