EP610PC-25 vs EP610PC-35 Comparaison
Comparaison détaillée côte à côte de EP610PC-25 par Altera et EP610PC-35 par Rochester Electronics. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP610PC-35 - 16-Macrocell Classic EPLD, 35ns tPD | Rochester
EP610PC-35 ✓ ActifComparaison des spécifications
| Paramètre | EP610PC-25 | EP610PC-35 |
|---|---|---|
| Marque | Altera | Rochester Electronics |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $9,75 | $16,79 |
| Device Family | Classic EPLD (EP610 series) | — |
| Macro Cells | 16 | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tpd) | 25 ns | — |
| Maximum Pipelined Data Rate | 100 MHz | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Technology | CMOS, EPROM (UV-erasable) | — |
| Device Type | OT PLD, PAL-type, CMOS | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | 4 | — |
| I/O Pins | 20 (bidirectional, JTAG-programmable OE per macrocell) | — |
| Boîtier | PDIP-24 (0.3 inch, through-hole) | 24-pin PDIP (Plastic DIP, 0.600" wide, through-hole) |
| Température de fonctionnement | [DATA_NEEDED: operating temperature grade] | 0C to +70C (commercial) |
| Programming Method | EPROM (UV-erasable), via Altera programming hardware | — |
| Type de montage | Through-Hole (DIP) | Through Hole |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status - not confirmed in provided data] |
| Family | — | Classic EPLD |
| Macrocells | — | 16 |
| Propagation Delay (tPD) | — | 37 ns (max, -35 speed grade) |
| Internal Counter Frequency | — | up to 100 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Supply Voltage - Internal | — | 4.75 V to 5.25 V |
| Programmable Type | — | EPLD (UV-erasable window variant: EP610DC; plastic OTP) |
| Supplier Device Package | — | 24-PDIP |
| Logic Family | — | CMOS |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Niveau MSL | — | [DATA_NEEDED: MSL level] |