EP610PI-25 vs EP610PC-25T Comparaison
Comparaison détaillée côte à côte de EP610PI-25 par Rochester Electronics et EP610PC-25T par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP610PI-25 - 16-Macrocell Classic EPLD, 25ns DIP-24 | Rochester
EP610PI-25 ObsoleteIntel
EP610PC-25T - 16-Macrocell Classic EPLD, 25ns, PDIP-24 | Intel / Altera
EP610PC-25T ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP610PI-25 | EP610PC-25T |
|---|---|---|
| Marque | Rochester Electronics | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $20,50 | $28,95 |
| Product Type | Erasable Programmable Logic Device (EPLD) | — |
| Series | Classic EP610 | — |
| Macrocells | 16 | — |
| Usable Gates | ~300 gates | — |
| Propagation Delay (tPD) | 25 ns | 25 ns (speed grade 25) |
| Maximum Internal Frequency (fCNT) | [DATA_NEEDED: fCNT] | — |
| Number of Dedicated Inputs | 4 | — |
| Number of Bidirectional I/O Pins | 16 | — |
| Boîtier | 24-pin DIP (PI) ceramic through-hole | PDIP-24 (Plastic DIP, 24-pin, 0.300 in row spacing) |
| Plage de température de fonctionnement | Industrial (I suffix): -40C to +85C | — |
| Supply Voltage (VCC) | 5 V nominal | 5 V |
| Process Technology | CMOS, UV-erasable | ECMOS (CMOS, EPROM-based) |
| Programmable Flip-Flop Modes | D, T, JK, SR (per macrocell) | — |
| Global Clock Pins | 1 | — |
| Type de montage | Through-Hole (DIP) | Through-hole |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS] | — |
| Original Manufacturer | Altera (now Intel PSG; legacy stock from Rochester Electronics) | — |
| Manufacturer | — | Intel (formerly Altera) |
| Distributor / Stocking Source | — | Rochester Electronics, LLC |
| Device Family | — | Altera Classic EPLD - EP610 |
| Device Type | — | Erasable Programmable Logic Device (EPLD, OTP for plastic package) |
| Logic Capacity | — | 300 usable gates |
| Macro Cells | — | 16 |
| Registers | — | 16 |
| User I/Os | — | 16 |
| Maximum Toggle Frequency | — | [DATA_NEEDED: max fmax] |
| Pipelined Data Rate | — | up to 100 MHz |
| Pinout Compatibility | — | Pin-compatible with EP610DC-25 (CERDIP-24, windowed) |
| Température de fonctionnement | — | 0 °C to +70 °C (commercial) |
| Programming Method | — | OTP (one-time programmable) via Altera programming hardware |
| Statut RoHS | — | [DATA_NEEDED: RoHS status] |
| Shipping Form (T suffix) | — | Tube |