EP910DI-30 vs EP910DC-40 Comparaison
Comparaison détaillée côte à côte de EP910DI-30 par Rochester Electronics et EP910DC-40 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Rochester Electronics
EP910DI-30 - 24-Macrocell EPLD, 30ns, CDIP-40 | Altera (Rochester)
EP910DI-30 NrndComparaison des spécifications
| Paramètre | EP910DI-30 | EP910DC-40 |
|---|---|---|
| Marque | Rochester Electronics | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | NRND | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $17,60 | $13,95 |
| Product Type | UV-Erasable Programmable Logic Device (EPLD) | — |
| Family | Classic EPLD (Altera EP910 series) | — |
| Macrocell Count | 24 | — |
| Propagation Delay (tpd) | 30 ns | — |
| Maximum Toggle Frequency (fmax) | 62 MHz | — |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Technology | CMOS, UV-erasable EPROM | — |
| Boîtier | CDIP-40 (ceramic DIP, 40-pin with UV window) | DIP-40 (ceramic, through-hole) |
| Type de montage | Through-Hole (DIP) | Through-Hole |
| Dedicated Inputs | 10 | 12 |
| Dedicated I/O Pins | 12 (12 input + 12 output) | — |
| Output Enable Pins | 2 | — |
| Nombre de broches | 40 | — |
| Programmable Logic Element | JEDEC fuse map (3rd-party programmer) | — |
| Température de fonctionnement | -40C to +85C (industrial) | — |
| Statut RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: rohs_status] |
| Manufacturer (Original) | Altera (now Intel PSG) | — |
| Current Distributor / Authorized Aftermarket | Rochester Electronics, LLC | — |
| Device Family | — | Classic EPLD (EP910 series) |
| Architecture | — | PAL-type AND/OR, UV-erasable CMOS |
| Macrocells | — | 24 |
| Bidirectional I/O Pins | — | 24 |
| Total Inputs to Logic Array | — | 36 |
| Product Terms | — | 240 maximum |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Operating Frequency (fMAX) | — | 25 MHz |
| Global Clocks | — | 2 |
| Tension d'alimentation | — | 5 V (typical for Classic EPLD family) |
| Operating Temperature (Commercial) | — | 0 °C to 70 °C |
| Programming Method | — | UV-erase + EPROM programmer; on-board logic test circuitry |