EP910DI-35 vs EP910DC-35 Comparaison
Comparaison détaillée côte à côte de EP910DI-35 par Altera et EP910DC-35 par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | EP910DI-35 | EP910DC-35 |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Obsolete |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $35,20 | $10,95 |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic EPLD | Classic EPLD EP910 |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 900 gates |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Toggle Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Supply Current (ICC) | 40 mA typical | — |
| Dedicated Inputs | 10 | 12 |
| Bidirectional I/O Pins | 20 | — |
| Total Pins | 40 | — |
| Boîtier | CDIP-40 (Ceramic DIP with UV window) | 40-pin CDIP (Ceramic DIP) with quartz window |
| Type de montage | Through-Hole | — |
| Température de fonctionnement | -40C to +85C (industrial) | 0 °C to +70 °C (commercial) |
| Technology | CMOS, UV-erasable EPROM | CMOS, UV-erasable EPROM cell |
| Programming Method | EPROM programmer + JEDEC fuse map | JEDEC fuse map via device programmer; UV erase |
| Erasure Method | UV light through quartz window | — |
| Statut RoHS | [DATA_NEEDED: RoHS status - ceramic CDIP legacy parts are typically non-compliant unless specified] | Non-compliant (ceramic DIP with Pb-bearing lead finish) |
| Logic Family | PAL-type AND/OR array with D flip-flops | — |
| Manufacturer | Original Altera; long-term authorized by Rochester Electronics, LLC | — |
| Device Type | — | UV-Erasable CMOS PLD (PAL-type) |
| Architecture | — | PAL-type sum-of-products AND-OR array |
| Product Terms | — | 240 |
| I/O Pins | — | 24 |
| Total Inputs | — | 36 |
| Propagation Delay (tpd) | — | 35 ns |
| Fréquence d'horloge maximale | — | 37 MHz (typical, internal) |
| Supply Voltage (Vcc) | — | 4.75 V to 5.25 V (5 V nominal) |
| Lead Pitch | — | 2.540 mm |
| Termination Style | — | Through-Hole |
| Lifecycle | — | Obsolete / last-time-buy from authorized distributors |